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Message-ID: <mhng-678de5a0-ca3d-48d1-848f-9a2431a874f2@palmer-si-x1c4> Date: Mon, 02 Apr 2018 20:15:44 -0700 (PDT) From: Palmer Dabbelt <palmer@...ive.com> To: alankao@...estech.com CC: albert@...ive.com, peterz@...radead.org, mingo@...hat.com, acme@...nel.org, alexander.shishkin@...ux.intel.com, jolsa@...hat.com, namhyung@...nel.org, sols@...ive.com, corbet@....net, linux-riscv@...ts.infradead.org, linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org, alankao@...estech.com Subject: Re: [PATCH 0/2] perf: riscv: Preliminary Perf Event Support on RISC-V On Mon, 02 Apr 2018 05:31:22 PDT (-0700), alankao@...estech.com wrote: > This implements the baseline PMU for RISC-V platforms. > > To ease future PMU portings, a guide is also written, containing > perf concepts, arch porting practices and some hints. > > Changes in v2: > - Fix the bug reported by Alex, which was caused by not sufficient > initialization. Check https://lkml.org/lkml/2018/3/31/251 for the > discussion. > > Alan Kao (2): > perf: riscv: preliminary RISC-V support > perf: riscv: Add Document for Future Porting Guide > > Documentation/riscv/pmu.txt | 249 +++++++++++++++++++ > arch/riscv/Kconfig | 12 + > arch/riscv/include/asm/perf_event.h | 76 +++++- > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/perf_event.c | 468 ++++++++++++++++++++++++++++++++++++ > 5 files changed, 802 insertions(+), 4 deletions(-) > create mode 100644 Documentation/riscv/pmu.txt > create mode 100644 arch/riscv/kernel/perf_event.c I'm having some trouble pulling this into my tree. I think you might have another patch floating around somewhere, as I don't have any arch/riscv/include/asm/perf_event.h right now. Do you mind rebasing this on top of linux-4.16 so I can look properly? Thanks!
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