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Date: Wed, 4 Apr 2018 17:52:59 +0800
From: David Wang <davidwang@...oxin.com>
To: <tglx@...utronix.de>, <mingo@...hat.com>, <hpa@...or.com>,
<mingo@...nel.org>, <x86@...nel.org>,
<linux-kernel@...r.kernel.org>
CC: <brucechang@...-alliance.com>, <cooperyan@...oxin.com>,
<qiyuanwang@...oxin.com>, <benjaminpan@...tech.com>,
<lukelin@...cpu.com>, <timguo@...oxin.com>,
David Wang <davidwang@...oxin.com>
Subject: [PATCH] x86/centaur: report correct CPU/cache topology
This patch is used to support multi-core Centaur CPU. After using this
patch, we can get correct CPU topology and correct cache topology.
Signed-off-by: David Wang <davidwang@...oxin.com>
---
arch/x86/kernel/cpu/centaur.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/x86/kernel/cpu/centaur.c b/arch/x86/kernel/cpu/centaur.c
index e5ec0f1..713e4db 100644
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -112,6 +112,19 @@ static void early_init_centaur(struct cpuinfo_x86 *c)
}
}
+static int centaur_num_cpu_cores(struct cpuinfo_x86 *c)
+{
+ unsigned int eax, ebx, ecx, edx;
+
+ if (c->cpuid_level < 4)
+ return 1;
+ cpuid_count(4, 0, &eax, &ebx, &ecx, &edx);
+ if (eax & 0x1f)
+ return (eax >> 26) + 1;
+ else
+ return 1;
+}
+
static void init_centaur(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_X86_32
@@ -128,6 +141,13 @@ static void init_centaur(struct cpuinfo_x86 *c)
clear_cpu_cap(c, 0*32+31);
#endif
early_init_centaur(c);
+
+ init_intel_cacheinfo(c);
+ c->x86_max_cores = centaur_num_cpu_cores(c);
+#ifdef CONFIG_X86_32
+ detect_ht(c);
+#endif
+
switch (c->x86) {
#ifdef CONFIG_X86_32
case 5:
--
1.9.1
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