linux-kernel - [PATCH 3/7] arm64: dts: renesas: r8a77970: add DU support

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Message-Id: <1523020092-25540-4-git-send-email-jacopo+renesas@jmondi.org>
Date:   Fri,  6 Apr 2018 15:08:08 +0200
From:   Jacopo Mondi <jacopo+renesas@...ndi.org>
To:     horms@...ge.net.au, magnus.damm@...il.com, geert@...ux-m68k.org,
        laurent.pinchart@...asonboard.com, niklas.soderlund@...natech.se,
        sergei.shtylyov@...entembedded.com
Cc:     Jacopo Mondi <jacopo+renesas@...ndi.org>,
        dri-devel@...ts.freedesktop.org, linux-renesas-soc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Vladimir Barinov <vladimir.barinov@...entembedded.com>,
        Niklas Söderlund 
        <niklas.soderlund+renesas@...natech.se>
Subject: [PATCH 3/7] arm64: dts: renesas: r8a77970: add DU support

From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>

Define the generic R8A77970 part of the DU device node.

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@...achi.com>.

Signed-off-by: Vladimir Barinov <vladimir.barinov@...entembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
---
 arch/arm64/boot/dts/renesas/r8a77970.dtsi | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index db06c94..e649e86 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -635,6 +635,34 @@
 			resets = <&cpg 623>;
 			renesas,fcp = <&fcpvd0>;
 		};
+
+		du: display@...00000 {
+			compatible = "renesas,du-r8a77970";
+			reg = <0 0xfeb00000 0 0x80000>;
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>;
+			clock-names = "du.0";
+			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+			vsps = <&vspd0>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					du_out_lvds: endpoint {
+					};
+				};
+			};
+		};
 	};
 
 	timer {
-- 
2.7.4