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Message-ID: <1845227.lvyihNjCgv@avalon>
Date: Fri, 06 Apr 2018 16:36:02 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Jacopo Mondi <jacopo+renesas@...ndi.org>
Cc: horms@...ge.net.au, magnus.damm@...il.com, geert@...ux-m68k.org,
niklas.soderlund@...natech.se, sergei.shtylyov@...entembedded.com,
dri-devel@...ts.freedesktop.org, linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Vladimir Barinov <vladimir.barinov@...entembedded.com>,
Niklas Söderlund
<niklas.soderlund+renesas@...natech.se>
Subject: Re: [PATCH 3/7] arm64: dts: renesas: r8a77970: add DU support
Hi Jacopo,
Thank you for the patch.
On Friday, 6 April 2018 16:08:08 EEST Jacopo Mondi wrote:
> From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
>
> Define the generic R8A77970 part of the DU device node.
>
> Based on the original (and large) patch by Daisuke Matsushita
> <daisuke.matsushita.ns@...achi.com>.
>
> Signed-off-by: Vladimir Barinov <vladimir.barinov@...entembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> ---
> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index db06c94..e649e86 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -635,6 +635,34 @@
> resets = <&cpg 623>;
> renesas,fcp = <&fcpvd0>;
> };
> +
> + du: display@...00000 {
> + compatible = "renesas,du-r8a77970";
> + reg = <0 0xfeb00000 0 0x80000>;
> + interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 724>;
> + clock-names = "du.0";
> + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
> + vsps = <&vspd0>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + du_out_rgb: endpoint {
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + du_out_lvds: endpoint {
> + };
> + };
> + };
> + };
> };
>
> timer {
--
Regards,
Laurent Pinchart
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