linux-kernel - [PATCH v2 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

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Message-Id: <1523263306-28665-3-git-send-email-tdas@codeaurora.org>
Date:   Mon,  9 Apr 2018 14:11:45 +0530
From:   Taniya Das <tdas@...eaurora.org>
To:     Stephen Boyd <sboyd@...eaurora.org>,
        Michael Turquette <mturquette@...libre.com>
Cc:     Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Rajendra Nayak <rnayak@...eaurora.org>,
        Odelu Kukatla <okukatla@...eaurora.org>,
        Amit Nischal <anischal@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        Taniya Das <tdas@...eaurora.org>
Subject: [PATCH v2 2/3] clk: qcom: gdsc: Add support to poll for higher timeout value

From: Amit Nischal <anischal@...eaurora.org>

For some gdscs, it might take longer time up to 500us for updating their
status. Update the timeout value for all GDSC polling status.

Signed-off-by: Amit Nischal <anischal@...eaurora.org>
Signed-off-by: Taniya Das <tdas@...eaurora.org>
---
 drivers/clk/qcom/gdsc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 266fefa..cb61c15 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -41,7 +41,7 @@
 #define RETAIN_MEM		BIT(14)
 #define RETAIN_PERIPH		BIT(13)

-#define TIMEOUT_US		100
+#define TIMEOUT_US		500

 #define domain_to_gdsc(domain) container_of(domain, struct gdsc, pd)

--
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