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Message-Id: <20180411183625.503352823@linuxfoundation.org>
Date: Wed, 11 Apr 2018 20:33:33 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Holger Brunck <holger.brunck@...mile.com>,
Zhao Qiang <qiang.zhao@....com>,
"David S. Miller" <davem@...emloft.net>,
Sasha Levin <alexander.levin@...rosoft.com>
Subject: [PATCH 4.9 074/310] fsl/qe: add bit description for SYNL register for GUMR
4.9-stable review patch. If anyone has any objections, please let me know.
------------------
From: Holger Brunck <holger.brunck@...mile.com>
[ Upstream commit c7f235a7c2d09b1b83671ba2d93ebee981554467 ]
Add the bitmask for the two bit SYNL register according to the QUICK
Engine Reference Manual.
Signed-off-by: Holger Brunck <holger.brunck@...mile.com>
Cc: Zhao Qiang <qiang.zhao@....com>
Signed-off-by: David S. Miller <davem@...emloft.net>
Signed-off-by: Sasha Levin <alexander.levin@...rosoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
include/soc/fsl/qe/qe.h | 4 ++++
1 file changed, 4 insertions(+)
--- a/include/soc/fsl/qe/qe.h
+++ b/include/soc/fsl/qe/qe.h
@@ -668,6 +668,10 @@ struct ucc_slow_pram {
#define UCC_FAST_GUMR_CTSS 0x00800000
#define UCC_FAST_GUMR_TXSY 0x00020000
#define UCC_FAST_GUMR_RSYN 0x00010000
+#define UCC_FAST_GUMR_SYNL_MASK 0x0000C000
+#define UCC_FAST_GUMR_SYNL_16 0x0000C000
+#define UCC_FAST_GUMR_SYNL_8 0x00008000
+#define UCC_FAST_GUMR_SYNL_AUTO 0x00004000
#define UCC_FAST_GUMR_RTSM 0x00002000
#define UCC_FAST_GUMR_REVD 0x00000400
#define UCC_FAST_GUMR_ENR 0x00000020
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