linux-kernel - Re: [PATCH v2 8/9] PCI: dwc: Small computation improvement

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Message-ID: <c295bc5b-e67a-290c-3316-56a1cc001538@synopsys.com>
Date:   Wed, 11 Apr 2018 08:40:05 +0100
From:   Gustavo Pimentel <gustavo.pimentel@...opsys.com>
To:     Jingoo Han <jingoohan1@...il.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
        "Joao.Pinto@...opsys.com" <Joao.Pinto@...opsys.com>,
        "kishon@...com" <kishon@...com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>
Cc:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 8/9] PCI: dwc: Small computation improvement

Hi Jingoo,

On 11/04/2018 01:01, Jingoo Han wrote:
> On Monday, April 9, 2018 5:41 AM, Gustavo Pimentel wrote:
>>
>> Replaces a simple division by 2 to a right shift rotation of 1 bit.
> 
> It looks good. However, would you add a simple reason to the commit
> message?

Sure.

Can be this one?

Probably any recent and decent compiler does this kind of substitution
in order to improve code performance. Nevertheless it's a coding good
practice whenever there is a division / multiplication by multiple of 2
to replace it by the equivalent operation in this case, the shift
rotation.

> 
> Best regards,
> Jingoo Han
> 
>>
>> Signed-off-by: Gustavo Pimentel <gustavo.pimentel@...opsys.com>
>> ---
>> Change v1->v2:
>> - Nothing changed, just to follow the patch set version.
>>
>>  drivers/pci/dwc/pcie-designware-host.c | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/pcie-designware-host.c
>> b/drivers/pci/dwc/pcie-designware-host.c
>> index 03e9b82..8e6fed4 100644
>> --- a/drivers/pci/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/dwc/pcie-designware-host.c
>> @@ -332,8 +332,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
>>
>>  	cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
>> "config");
>>  	if (cfg_res) {
>> -		pp->cfg0_size = resource_size(cfg_res) / 2;
>> -		pp->cfg1_size = resource_size(cfg_res) / 2;
>> +		pp->cfg0_size = resource_size(cfg_res) >> 1;
>> +		pp->cfg1_size = resource_size(cfg_res) >> 1;
>>  		pp->cfg0_base = cfg_res->start;
>>  		pp->cfg1_base = cfg_res->start + pp->cfg0_size;
>>  	} else if (!pp->va_cfg0_base) {
>> @@ -377,8 +377,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
>>  			break;
>>  		case 0:
>>  			pp->cfg = win->res;
>> -			pp->cfg0_size = resource_size(pp->cfg) / 2;
>> -			pp->cfg1_size = resource_size(pp->cfg) / 2;
>> +			pp->cfg0_size = resource_size(pp->cfg) >> 1;
>> +			pp->cfg1_size = resource_size(pp->cfg) >> 1;
>>  			pp->cfg0_base = pp->cfg->start;
>>  			pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
>>  			break;
>> --
>> 2.7.4
>>
> 
> 

Regards,
Gustavo