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Message-ID: <20180413235217.GA19138@saruman>
Date: Sat, 14 Apr 2018 00:52:18 +0100
From: James Hogan <jhogan@...nel.org>
To: Sinan Kaya <okaya@...eaurora.org>
Cc: linux-mips@...ux-mips.org, arnd@...db.de, timur@...eaurora.org,
sulrich@...eaurora.org, linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Ralf Baechle <ralf@...ux-mips.org>,
Paul Burton <paul.burton@...s.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 2/2] MIPS: io: add a barrier after register read in
readX()
On Thu, Apr 12, 2018 at 10:33:42PM -0400, Sinan Kaya wrote:
> On 4/12/2018 10:30 PM, Sinan Kaya wrote:
> > + /* prevent prefetching of coherent DMA dma prematurely */ \
>
> I tried to write DMA data but my keyboard is not cooperating. I'll hold onto
> posting another version until I hear back from you for wmb().
No problem, I've applied both for 4.17 and tweaked the comment.
Thanks
James
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