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Message-ID: <20180416213730.isfggqngv6zjxahg@rob-hp-laptop>
Date: Mon, 16 Apr 2018 16:37:30 -0500
From: Rob Herring <robh@...nel.org>
To: Michel Pollet <michel.pollet@...renesas.com>
Cc: linux-renesas-soc@...r.kernel.org,
Simon Horman <horms@...ge.net.au>, phil.edworthy@...esas.com,
buserror+upstream@...il.com, Mark Rutland <mark.rutland@....com>,
Magnus Damm <magnus.damm@...il.com>,
Russell King <linux@...linux.org.uk>,
Carlo Caione <carlo@...lessm.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rajendra Nayak <rnayak@...eaurora.org>,
Stefan Wahren <stefan.wahren@...e.com>,
Frank Rowand <frank.rowand@...y.com>,
Juri Lelli <juri.lelli@....com>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [RFC 1/3] dt-bindings: cpu: Add Renesas RZ/N1D SMP enable method.
On Mon, Apr 16, 2018 at 10:34:57AM +0100, Michel Pollet wrote:
> Add a special enable method for second CA8 of the Renesas RZ/N1D
> (R9A06G032).
>
> Signed-off-by: Michel Pollet <michel.pollet@...renesas.com>
> ---
> Documentation/devicetree/bindings/arm/cpus.txt | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Rob Herring <robh@...nel.org>
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