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Message-ID: <CA+Ln22E17WK2GA_6-AXZu9Z+Q_Nb86xO6npZvrCc21ciYwHt8w@mail.gmail.com>
Date: Tue, 17 Apr 2018 11:12:38 +0900
From: Tomasz Figa <tomasz.figa@...il.com>
To: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
Cc: Krzysztof Kozlowski <krzk@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
"linus.walleij@...aro.org" <linus.walleij@...aro.org>,
Kukjin Kim <kgene@...nel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
"moderated list:SAMSUNG SOC CLOCK DRIVERS"
<linux-samsung-soc@...r.kernel.org>, linux-gpio@...r.kernel.org,
linux-kernel <linux-kernel@...r.kernel.org>,
stable@...r.kernel.org
Subject: Re: [PATCH v2 1/2] pinctrl/samsung: Correct EINTG banks order
2018-04-17 0:52 GMT+09:00 Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>:
> All banks with GPIO interrupts should be at beginning
> of bank array and without any other types of banks between them.
> This order is expected by exynos_eint_gpio_irq, when doing
> interrupt group to bank translation.
> Otherwise, kernel NULL pointer dereference would happen
> when trying to handle interrupt, due to wrong bank being looked up.
> Observed on s5pv210, when trying to handle gpj0 interrupt,
> where kernel was mapping it to gpi bank.
>
> Cc: stable@...r.kernel.org
> Fixes: 023e06dfa6882f500b9c86fd61f0b1913aa07f36 ("pinctrl: exynos: add exynos5410 SoC specific data")
> Fixes: 608a26a7bc04a39cfd7041f31ca2b2100113d14e ("pinctrl: Add s5pv210 support to pinctrl-exynos)
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>
> ---
>
> Changes from v1:
> - Limit changes to s5pv210 and Exynos5410. Exynos3250 will be handled later.
> - Added cc stable
> - Added fixes tag
> ---
> drivers/pinctrl/samsung/pinctrl-exynos-arm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Tomasz Figa <tomasz.figa@...il.com>
Thanks for the patch!
Best regards,
Tomasz
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