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Message-ID: <38a1d4e3-cabe-6c39-4355-8d8111637382@codeaurora.org>
Date: Tue, 17 Apr 2018 10:13:28 -0400
From: Sinan Kaya <okaya@...eaurora.org>
To: James Bottomley <James.Bottomley@...senPartnership.com>,
linux-parisc@...r.kernel.org, arnd@...db.de, timur@...eaurora.org,
sulrich@...eaurora.org
Cc: linux-arm-msm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, Helge Deller <deller@....de>,
Philippe Ombredanne <pombredanne@...b.com>,
Kate Stewart <kstewart@...uxfoundation.org>,
Thomas Gleixner <tglx@...utronix.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/2] parisc: define stronger ordering for the default
readX()
Hi James,
>
> Perhaps if you gave an example of the actual problem you're trying to
> fix we could assess if it affects parisc.
Let me clarify myself here. Maybe, there is a better solution.
/* assign ownership */
desc->status = DEVICE_OWN;
/* notify device of new descriptors */
writel(DESC_NOTIFY, doorbell);
The difference between writel() and writel_relax() is writel() guarantees
memory transactions to be flushed to the device before the register write.
writel_relaxed() does not provide any guarantees about the memory and IO
operations.
Similarly, readl() provides following code to observe the DMA result while
readl_relaxed() does not provide this guarantee.
Ideally, you want to embed rmb() and wmb() into the writel() and readl()
to provide this guarantee.
PA-RISC doesn't seem to support neither one of the barrier types. If you are
familiar with the architecture, maybe you could guide us here.
Is __raw_writeX() enough to provide this guarantee for this architecture?
Sinan
--
Sinan Kaya
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.
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