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Message-ID: <20180418073558.mebtl457ss2rzhrm@suse.de>
Date: Wed, 18 Apr 2018 09:35:58 +0200
From: Joerg Roedel <jroedel@...e.de>
To: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Joerg Roedel <joro@...tes.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...nel.org>,
"H . Peter Anvin" <hpa@...or.com>,
the arch/x86 maintainers <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-mm <linux-mm@...ck.org>, Andy Lutomirski <luto@...nel.org>,
Dave Hansen <dave.hansen@...el.com>,
Josh Poimboeuf <jpoimboe@...hat.com>,
Juergen Gross <jgross@...e.com>,
Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>, Jiri Kosina <jkosina@...e.cz>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Brian Gerst <brgerst@...il.com>,
David Laight <David.Laight@...lab.com>,
Denys Vlasenko <dvlasenk@...hat.com>,
Eduardo Valentin <eduval@...zon.com>,
Greg KH <gregkh@...uxfoundation.org>,
Will Deacon <will.deacon@....com>,
"Liguori, Anthony" <aliguori@...zon.com>,
Daniel Gruss <daniel.gruss@...k.tugraz.at>,
Hugh Dickins <hughd@...gle.com>,
Kees Cook <keescook@...gle.com>,
Andrea Arcangeli <aarcange@...hat.com>,
Waiman Long <llong@...hat.com>, Pavel Machek <pavel@....cz>,
"David H . Gutteridge" <dhgutteridge@...patico.ca>
Subject: Re: [PATCH 00/35 v5] PTI support for x32
On Mon, Apr 16, 2018 at 09:13:22AM -0700, Linus Torvalds wrote:
> See for example commit 8c06c7740d19 ("x86/pti: Leave kernel text
> global for !PCID") and in particular the performance numbers (that's
> an Atom microserver, but it was chosen due to lack of PCID).
Okay, I checked this on 32 bit and after some small changes I got
identical mappings with GLB set in all page-tables. The changes were:
* Don't change permission bits in pti_clone_kernel_text().
Changing them does not make a difference on 64 bit as
everything cloned in this function is RO anyway. On 32 bit
some areas are mapped RW, so it does make a difference there.
Having different permissions between kernel and user
page-table does also not make sense, because a permission
mismatch in the TLB will cause a re-walk, which is as fast as
not mapping it at all.
* Mapping kernel-text to user-space on 32 bit too. Since there
is no PCID this should improve performance. I have not
measured that yet, but will do so before posting the next
version.
I do some more testing and performance measurements and will send
version 6 of my patches beginning of next week when v4.17-rc2 is out.
Regards,
Joerg
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