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Message-ID: <CAJKOXPdoJV_3BucTjJ0xxd6cc6PYy3W0L8e_emmDmwZnhgXqvA@mail.gmail.com>
Date: Wed, 18 Apr 2018 17:47:04 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Tomasz Figa <tomasz.figa@...il.com>
Cc: Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
"linus.walleij@...aro.org" <linus.walleij@...aro.org>,
Kukjin Kim <kgene@...nel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
"moderated list:SAMSUNG SOC CLOCK DRIVERS"
<linux-samsung-soc@...r.kernel.org>, linux-gpio@...r.kernel.org,
linux-kernel <linux-kernel@...r.kernel.org>,
stable@...r.kernel.org
Subject: Re: [PATCH v2 1/2] pinctrl/samsung: Correct EINTG banks order
On Tue, Apr 17, 2018 at 4:12 AM, Tomasz Figa <tomasz.figa@...il.com> wrote:
> 2018-04-17 0:52 GMT+09:00 Paweł Chmiel <pawel.mikolaj.chmiel@...il.com>:
>> All banks with GPIO interrupts should be at beginning
>> of bank array and without any other types of banks between them.
>> This order is expected by exynos_eint_gpio_irq, when doing
>> interrupt group to bank translation.
>> Otherwise, kernel NULL pointer dereference would happen
>> when trying to handle interrupt, due to wrong bank being looked up.
>> Observed on s5pv210, when trying to handle gpj0 interrupt,
>> where kernel was mapping it to gpi bank.
>>
>> Cc: stable@...r.kernel.org
>> Fixes: 023e06dfa6882f500b9c86fd61f0b1913aa07f36 ("pinctrl: exynos: add exynos5410 SoC specific data")
>> Fixes: 608a26a7bc04a39cfd7041f31ca2b2100113d14e ("pinctrl: Add s5pv210 support to pinctrl-exynos)
Use short SHA (for example: git config --global core.abbrev 12; git
config --global pretty.fixes 'Fixes: %h ("%s")' ; git config --global
alias.sf 'show --pretty=fixes' ; git sf COMMIT).
The subject prefix should be "pinctrl: samsung:" (git log --oneline --
drivers/pinctrl/samsung/).
I fixed this, re-wrapped commit for 72-column and applied to my tree.
Linus,
I'll send them to you in pull request for next release cycle.
Best regards,
Krzysztof
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