linux-kernel - Re: [PATCH 03/35] x86/entry/32: Load task stack from x86

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Message-ID: <CALCETrWYdug6cY_ZjGPV19baFWb_VZxMHGmfxnoJfnXP7z=1Sg@mail.gmail.com>
Date:   Wed, 18 Apr 2018 17:44:56 -0700
From:   Andy Lutomirski <luto@...nel.org>
To:     Andi Kleen <ak@...ux.intel.com>
Cc:     Linus Torvalds <torvalds@...ux-foundation.org>,
        Joerg Roedel <joro@...tes.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...nel.org>,
        "H . Peter Anvin" <hpa@...or.com>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-mm <linux-mm@...ck.org>, Andy Lutomirski <luto@...nel.org>,
        Dave Hansen <dave.hansen@...el.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Juergen Gross <jgross@...e.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Borislav Petkov <bp@...en8.de>, Jiri Kosina <jkosina@...e.cz>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Brian Gerst <brgerst@...il.com>,
        David Laight <David.Laight@...lab.com>,
        Denys Vlasenko <dvlasenk@...hat.com>,
        Eduardo Valentin <eduval@...zon.com>,
        Greg KH <gregkh@...uxfoundation.org>,
        Will Deacon <will.deacon@....com>,
        "Liguori, Anthony" <aliguori@...zon.com>,
        Daniel Gruss <daniel.gruss@...k.tugraz.at>,
        Hugh Dickins <hughd@...gle.com>,
        Kees Cook <keescook@...gle.com>,
        Andrea Arcangeli <aarcange@...hat.com>, Waim@...ux.intel.com
Subject: Re: [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in
 SYSENTER handler

On Wed, Apr 18, 2018 at 5:38 PM, Andi Kleen <ak@...ux.intel.com> wrote:
> On Wed, Apr 18, 2018 at 05:02:02PM -0700, Linus Torvalds wrote:
>> On Wed, Apr 18, 2018 at 4:26 PM, Andi Kleen <ak@...ux.intel.com> wrote:
>> >
>> > Seems like a hack. Why can't that be stored in a per cpu variable?
>>
>> It *is* a percpu variable - the whole x86_tss structure is percpu.
>>
>> I guess it could be a different (separate) percpu variable, but might
>> as well use the space we already have allocated.
>
> Would be better/cleaner to use a separate variable instead of reusing
> x86 structures like this. Who knows what subtle side effects that
> may have eventually.


This variable is extremely hot, and it’s used under the same
circumstances as sp0, so sharing a cache line makes sense. And x86_64
works this way.

>
> It will be also easier to understand in the code.

I suppose it could go right before the TSS, but then we have potential
alignment issues.  We could also muck with unions to give the field an
alternative, clearer name, I suppose.  But this patch should go in
regardless and any cleanups should be done on x86_32 and x86_64
simultaneously, I think.