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Message-Id: <1524538918-21141-1-git-send-email-joyce.ooi@intel.com>
Date:   Tue, 24 Apr 2018 11:01:58 +0800
From:   "Ooi, Joyce" <joyce.ooi@...el.com>
To:     Dinh Nguyen <dinguyen@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Ooi Joyce <joyce.ooi@...el.com>,
        See Chin Liang <chin.liang.see@...el.com>,
        Yves Vandervennet <yves.vandervennet@...el.com>,
        Ong Hean Loong <hean.loong.ong@...el.com>
Subject: [PATCH] arm64: dts: stratix10: Change pad skew values for EMAC0 PHY driver

The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay.

Signed-off-by: Ooi, Joyce <joyce.ooi@...el.com>
---
 .../boot/dts/altera/socfpga_stratix10_socdk.dts    |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index 0007564..8785f78 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -79,7 +79,7 @@
 			rxd2-skew-ps = <420>; /* 0ps */
 			rxd3-skew-ps = <420>; /* 0ps */
 			txen-skew-ps = <0>; /* -420ps */
-			txc-skew-ps = <1860>; /* 960ps */
+			txc-skew-ps = <900>; /* 0ps */
 			rxdv-skew-ps = <420>; /* 0ps */
 			rxc-skew-ps = <1680>; /* 780ps */
 		};
-- 
1.7.1

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