| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 24 Apr 2018 23:43:22 +0800
From: Sean Wang <sean.wang@...iatek.com>
To: Rob Herring <robh@...nel.org>
CC: <mturquette@...libre.com>, <sboyd@...nel.org>, <airlied@...ux.ie>,
<matthias.bgg@...il.com>, <mark.rutland@....com>,
<devicetree@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<linux-clk@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 3/4] clk: mediatek: add g3dsys support for MT2701 and
MT7623
On Tue, 2018-04-24 at 09:40 -0500, Rob Herring wrote:
> On Wed, Apr 18, 2018 at 06:24:55PM +0800, sean.wang@...iatek.com wrote:
> > From: Sean Wang <sean.wang@...iatek.com>
> >
> > Add clock driver support for g3dsys on MT2701 and MT7623, which is
> > providing essential clock gate and reset controller to Mali-450.
> >
> > Signed-off-by: Sean Wang <sean.wang@...iatek.com>
> > ---
> > drivers/clk/mediatek/Kconfig | 6 ++
> > drivers/clk/mediatek/Makefile | 1 +
> > drivers/clk/mediatek/clk-mt2701-g3d.c | 95 +++++++++++++++++++++++++++++++
>
> > include/dt-bindings/clock/mt2701-clk.h | 4 ++
> > include/dt-bindings/reset/mt2701-resets.h | 3 +
>
> These below in the binding patch.
>
Thanks, I will split them out in the next version.
> > 5 files changed, 109 insertions(+)
> > create mode 100644 drivers/clk/mediatek/clk-mt2701-g3d.c
Powered by blists - more mailing lists