lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2d9f0678-ec5c-2b09-7ddd-407dd37c55a1@arm.com>
Date:   Wed, 25 Apr 2018 08:07:31 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     valmiki <valmikibow@...il.com>, linux-kernel@...r.kernel.org
Cc:     tglx@...utronix.de, jason@...edaemon.net,
        Catalin Marinas <catalin.marinas@....com>
Subject: Re: Affinity for GIC irq line

On 25/04/18 04:23, valmiki wrote:
> Hi all,
> 
> When an IRQ line is set affinity using irq_set_affinity, which calls 
> irq_do_set_affinity, this API copies affinity mask to affinity variable 
> in irq_common_data of this irq descriptor.

It does a wee bit more. Crucially, it contains the line:

        ret = chip->irq_set_affinity(data, mask, force);

> But as per ARM GICv2 document in order to drive a interrupt to a 
> specific CPU we need to program GICD_ITARGETSRn register.
> 
> But irq_set_affinity isn't writing to this register.Please correct me if 
> I'm wrong i did not find code for this register being updated in 
> irq_set_affinity flow.
> So how affinity is being set for an IRQ line ?

I would have though that a function name such as "gic_set_affinity" was
clear enough?

> If affinity was set successfully on what CPU does asm_do_IRQ run ?

It runs on the CPU that the interrupt targets, I'd say.

	M.
-- 
Jazz is not dead. It just smells funny...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ