lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 25 Apr 2018 18:33:40 +0800
From:   David Wang <davidwang@...oxin.com>
To:     <bp@...en8.de>, <tony.luck@...el.com>, <tglx@...utronix.de>,
        <mingo@...hat.com>, <hpa@...or.com>, <gregkh@...uxfoundation.org>,
        <x86@...nel.org>, <linux-kernel@...r.kernel.org>,
        <linux-edac@...r.kernel.org>
CC:     <brucechang@...-alliance.com>, <cooperyan@...oxin.com>,
        <qiyuanwang@...oxin.com>, <benjaminpan@...tech.com>,
        <lukelin@...cpu.com>, <timguo@...oxin.com>,
        David Wang <davidwang@...oxin.com>
Subject: [PATCH v3 2/2] x86/mce: add CMCI support for Centaur CPUs

Newer Centaur support CMCI mechnism, which is compatible with INTEL CMCI.

Signed-off-by: David Wang <davidwang@...oxin.com>
---
 arch/x86/kernel/cpu/mcheck/mce.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 38ccab8..f9a7295 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1757,6 +1757,8 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 		}
 	case X86_VENDOR_CENTAUR:
 		mce_centaur_feature_init(c);
+		mce_intel_feature_init(c);
+		mce_adjust_timer = cmci_intel_adjust_timer;
 		break;
 
 	default:
-- 
1.9.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ