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Message-ID: <9571735d-929f-a2ef-ed97-dc9193420b73@arm.com>
Date: Thu, 26 Apr 2018 17:45:38 +0100
From: Andre Przywara <andre.przywara@....com>
To: icenowy@...c.io, Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Chen-Yu Tsai <wens@...e.org>
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com
Subject: Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h6: add device tree
nodes for MMC controllers
Hi,
On 26/04/18 15:07, Icenowy Zheng wrote:
> The Allwinner H6 SoC have 3 MMC controllers.
>
> Add device tree nodes for them.
>
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 56 ++++++++++++++++++++++++++++
> 1 file changed, 56 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 4debc3962830..3cbfc035c979 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -124,12 +124,68 @@
> interrupt-controller;
> #interrupt-cells = <3>;
>
> + mmc0_pins: mmc0-pins {
> + pins = "PF0", "PF1", "PF2", "PF3",
> + "PF4", "PF5";
> + function = "mmc0";
> + drive-strength = <30>;
> + bias-pull-up;
> + };
> +
> + mmc2_pins: mmc2-pins {
> + pins = "PC1", "PC4", "PC5", "PC6",
> + "PC7", "PC8", "PC9", "PC10",
> + "PC11", "PC12", "PC13", "PC14";
> + function = "mmc2";
> + drive-strength = <30>;
> + bias-pull-up;
> + };
> +
> uart0_ph_pins: uart0-ph {
> pins = "PH0", "PH1";
> function = "uart0";
> };
> };
>
> + mmc0: mmc@...0000 {
> + compatible = "allwinner,sun50i-h6-mmc";
This should be:
compatible = "allwinner,sun50i-h6-mmc",
"allwinner,sun50i-a64-mmc";
> + reg = <0x04020000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC0>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mmc1: mmc@...1000 {
> + compatible = "allwinner,sun50i-h6-mmc";
same here
> + reg = <0x04021000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC1>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + mmc2: mmc@...2000 {
> + compatible = "allwinner,sun50i-h6-emmc";
and here:
compatible = "allwinner,sun50i-h6-emmc",
"allwinner,sun50i-a64-emmc";
The rest looks correct to me.
Cheers,
Andre.
> + reg = <0x04022000 0x1000>;
> + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
> + clock-names = "ahb", "mmc";
> + resets = <&ccu RST_BUS_MMC2>;
> + reset-names = "ahb";
> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> uart0: serial@...0000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x05000000 0x400>;
>
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