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Message-Id: <1524864877-111962-1-git-send-email-suravee.suthikulpanit@amd.com>
Date: Fri, 27 Apr 2018 16:34:33 -0500
From: Suravee Suthikulpanit <suravee.suthikulpanit@....com>
To: linux-kernel@...r.kernel.org, x86@...nel.org
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com, bp@...e.de,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>
Subject: [PATCH v2 0/4] x86/CPU: Update AMD Last-Level-Cache Information
First, clean up last-level-cache parameters so that it could not
require ifdef CONFIG_SMP. Then, consolidate cache-info-related
code for x86 into arch/x86/kernel/cpu/cacheinfo.c.
Finally, for AMD, introduce new logic to derive LLC ID from APIC ID.
Thanks,
Suravee
Changes from V1 (https://lkml.org/lkml/2018/3/26/24)
* 4/4: Do not EXPORT_SYMBOL_GPL for cacheinfo_amd_init_llc_id.
Borislav Petkov (2):
x86/CPU/AMD: Remove unnecessary check for CONFIG_SMP
x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c
Suravee Suthikulpanit (2):
perf/x86/amd/uncore: Fix amd_uncore_llc ID to use pre-defined
cpu_llc_id
x86/CPU/AMD: Calculate LLC ID from number of sharing threads
arch/x86/events/amd/uncore.c | 21 ++-----------
arch/x86/include/asm/cacheinfo.h | 7 +++++
arch/x86/include/asm/smp.h | 1 -
arch/x86/kernel/cpu/Makefile | 2 +-
arch/x86/kernel/cpu/amd.c | 25 ++-------------
.../kernel/cpu/{intel_cacheinfo.c => cacheinfo.c} | 36 ++++++++++++++++++++++
arch/x86/kernel/cpu/common.c | 7 +++++
arch/x86/kernel/smpboot.c | 7 -----
8 files changed, 56 insertions(+), 50 deletions(-)
create mode 100644 arch/x86/include/asm/cacheinfo.h
rename arch/x86/kernel/cpu/{intel_cacheinfo.c => cacheinfo.c} (96%)
--
2.7.4
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