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Message-ID: <1524948829.2693.547.camel@hpe.com>
Date: Sat, 28 Apr 2018 20:54:42 +0000
From: "Kani, Toshi" <toshi.kani@....com>
To: "joro@...tes.org" <joro@...tes.org>
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Subject: Re: [PATCH v2 2/2] x86/mm: implement free pmd/pte page interfaces
On Sat, 2018-04-28 at 11:02 +0200, joro@...tes.org wrote:
> On Fri, Apr 27, 2018 at 02:31:51PM +0000, Kani, Toshi wrote:
> > So, we can add the step 2 on top of this patch.
> > 1. Clear pud/pmd entry.
> > 2. System wide TLB flush <-- TO BE ADDED BY NEW PATCH
> > 3. Free its underlining pmd/pte page.
>
> This still lacks the page-table synchronization and will thus not fix
> the BUG_ON being triggered.
The BUG_ON issue is specific to PAE that it syncs at the pmd level.
x86/64 does not have this issue since it syncs at the pgd or p4d level.
> > We do not need to revert this patch. We can make the above change I
> > mentioned.
>
> Please note that we are not in the merge window anymore and that any fix
> needs to be simple and obviously correct.
Understood. Changing the x86/32 sync point is risky. So, I am going to
revert the free page handling for PAE.
Thanks,
-Toshi
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