linux-kernel - Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3

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Message-ID: <CAEi0qNkt75cqF=03HrQ81+pDdWVOpzGiHrk8_cTNTJo9os9D8Q@mail.gmail.com>
Date:   Sat, 28 Apr 2018 23:37:55 -0700
From:   Joel Fernandes <joel.opensrc@...il.com>
To:     Julien Thierry <julien.thierry@....com>
Cc:     Linux ARM Kernel List <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        mark.rutland@....com, marc.zyngier@....com, james.morse@....com,
        daniel.thompson@...aro.org, Joel Fernandes <joelaf@...gle.com>
Subject: Re: [PATCH v2 0/6] arm64: provide pseudo NMI with GICv3

On Wed, Jan 17, 2018 at 4:10 AM, Julien Thierry <julien.thierry@....com> wrote:
> Hi,
>
> On 17/01/18 11:54, Julien Thierry wrote:
>>
>> This series is a continuation of the work started by Daniel [1]. The goal
>> is to use GICv3 interrupt priorities to simulate an NMI.
>>
>
>
> I have submitted a separate series making use of this feature for the ARM
> PMUv3 interrupt [1].

I guess the hard lockup detector using NMI could be a nice next step
to see how well it works with lock up detection. That's the main
usecase for my interest. However, perf profiling is also a strong one.

thanks,

- Joel