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Message-ID: <152521027630.138124.3736014507579667653@swboyd.mtv.corp.google.com>
Date: Tue, 01 May 2018 14:31:16 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Dmitry Osipenko <digetx@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Linus Walleij <linus.walleij@...aro.org>,
Marc Dietrich <marvin24@....de>,
Marcel Ziswiler <marcel@...wiler.com>,
Michael Turquette <mturquette@...libre.com>,
Peter De Schrijver <pdeschrijver@...dia.com>,
Prashant Gaikwad <pgaikwad@...dia.com>,
Thierry Reding <thierry.reding@...il.com>
Cc: linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 3/4] clk: tegra20: Set correct parents for CDEV1/2 clocks
Quoting Dmitry Osipenko (2018-04-26 16:58:17)
> Parents of CDEV1/2 clocks are determined by muxing of the corresponding
> pins. Pinctrl driver now provides the CDEV1/2 clock muxes and hence
> CDEV1/2 clocks could have correct parents. Set CDEV1/2 parents to the
> corresponding muxes to fix the parents.
>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
Acked-by: Stephen Boyd <sboyd@...nel.org>
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