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Message-ID: <41027d71-a0b5-b78d-e9bf-aec4beb05a59@gmail.com>
Date: Wed, 2 May 2018 12:27:26 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: argus.lin@...iatek.com, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>
Cc: Chenglin Xu <chenglin.xu@...iatek.com>,
Sean Wang <sean.wang@...iatek.com>, wsd_upstream@...iatek.com,
henryc.chen@...iatek.com, flora.fu@...iatek.com,
Chen Zhong <chen.zhong@...iatek.com>,
Christophe Jaillet <christophe.jaillet@...adoo.fr>,
"shailendra . v" <shailendra.v@...sung.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH V4 2/8] soc: mediatek: pwrap: add caps flag for pwrap
On 05/02/2018 11:21 AM, argus.lin@...iatek.com wrote:
> From: Argus Lin <argus.lin@...iatek.com>
>
> We use caps to describe pwrap's capability, used
> to replace has_bridge flag for single meaning.
>
> Signed-off-by: Argus Lin <argus.lin@...iatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index e9e054a15b7d..3a25ff6e6907 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -76,6 +76,12 @@
> #define PWRAP_SLV_CAP_SECURITY BIT(2)
> #define HAS_CAP(_c, _x) (((_c) & (_x)) == (_x))
>
> +/* Group of bits used for shown pwrap capability */
> +#define PWRAP_CAP_BRIDGE BIT(0)
> +#define PWRAP_CAP_RESET BIT(1)
> +#define PWRAP_CAP_DCM BIT(2)
> +#define PWRAP_CAP_INT1_EN BIT(3)
> +
You are missing the logic to handle the caps.
With out this logic, this patch is useless.
Regards,
Matthias
> /* defines for slave device wrapper registers */
> enum dew_regs {
> PWRAP_DEW_BASE,
> @@ -684,6 +690,8 @@ struct pmic_wrapper_type {
> u32 spi_w;
> u32 wdt_src;
> unsigned int has_bridge:1;
> + /* Flags indicating the capability for the target pwrap */
> + u8 caps;
> int (*init_reg_clock)(struct pmic_wrapper *wrp);
> int (*init_soc_specific)(struct pmic_wrapper *wrp);
> };
> @@ -1394,6 +1402,7 @@ static const struct pmic_wrapper_type pwrap_mt2701 = {
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE_NEW,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> .has_bridge = 0,
> + .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_mt2701_init_reg_clock,
> .init_soc_specific = pwrap_mt2701_init_soc_specific,
> };
> @@ -1406,6 +1415,7 @@ static const struct pmic_wrapper_type pwrap_mt7622 = {
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> .has_bridge = 0,
> + .caps = PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_common_init_reg_clock,
> .init_soc_specific = pwrap_mt7622_init_soc_specific,
> };
> @@ -1418,6 +1428,7 @@ static const struct pmic_wrapper_type pwrap_mt8135 = {
> .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> .has_bridge = 1,
> + .caps = PWRAP_CAP_BRIDGE | PWRAP_CAP_RESET | PWRAP_CAP_DCM,
> .init_reg_clock = pwrap_common_init_reg_clock,
> .init_soc_specific = pwrap_mt8135_init_soc_specific,
> };
> --
> 2.12.5
>
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