linux-kernel - Re: [PATCH 01/12] mtd: nand: davinci: store the core chipselect number in platform data

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Message-ID: <CAMRc=Md4_QvyMP_vwwD8qpONr3SmWoxn+BJDd1OBHdR6rCLoWg@mail.gmail.com>
Date:   Wed, 2 May 2018 12:45:38 +0200
From:   Bartosz Golaszewski <brgl@...ev.pl>
To:     Sekhar Nori <nsekhar@...com>
Cc:     Kevin Hilman <khilman@...nel.org>,
        Russell King <linux@...linux.org.uk>,
        Boris Brezillon <boris.brezillon@...tlin.com>,
        Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Tony Lindgren <tony@...mide.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-mtd@...ts.infradead.org,
        Bartosz Golaszewski <bgolaszewski@...libre.com>
Subject: Re: [PATCH 01/12] mtd: nand: davinci: store the core chipselect
 number in platform data

2018-05-01 12:29 GMT+02:00 Sekhar Nori <nsekhar@...com>:
> On Tuesday 01 May 2018 03:23 PM, Sekhar Nori wrote:
>> On Tuesday 01 May 2018 02:55 PM, Sekhar Nori wrote:
>>> On Monday 30 April 2018 01:54 PM, Bartosz Golaszewski wrote:
>>>> From: Bartosz Golaszewski <bgolaszewski@...libre.com>
>>>>
>>>> We have the 'ti,davinci-chipselect' property in the device tree, but
>>>> when using platform data the driver silently uses the id field of
>>>> struct platform_device as the chipselect. This is confusing and we
>>>> almost broke the nand support again recently after converting the
>>>> platform to common clock framework (which changed the device id in the
>>>> clock lookup - the problem is gone now that we no longer acquire the
>>>> clock in the nand driver.
>>>>
>>>> This patch adds a new filed - core_chipsel - to the platform_data.
>>>
>>> s/filed/field
>>>
>>>> Subsequent patches will convert the platforms to using this new field.
>>>
>>> Can you add a comment for this new field too, like how we have for most
>>> other fields?
>>>
>>> Curious on what 'core' in core_chipsel means. Something to do with
>>> chip-select offset we have on DA850?
>>
>> Looks like you may have just picked the terminology from DaVinci NAND
>> driver (introduced back in 2009). But in this context, it means the
>> 0-indexed chip-select number that of the asynchronous memory interface
>> to which the NAND device is connected.
>>
>> So, may be a comment here will suffice.
>
> This is what I committed:
>

I don't see it in your tree yet.

> --8<--
> commit 533d93703fa717fdf74c4fb711c868c4fdc8b475 (HEAD -> refs/heads/v4.18/nand-cs-simplification)
> Author:     Bartosz Golaszewski <bgolaszewski@...libre.com>
> AuthorDate: Mon Apr 30 10:24:42 2018 +0200
> Commit:     Sekhar Nori <nsekhar@...com>
> CommitDate: Tue May 1 15:57:47 2018 +0530
>
>     mtd: nand: davinci: store the core chipselect number in platform data
>
>     We have the 'ti,davinci-chipselect' property in the device tree, but
>     when using platform data the driver silently uses the id field of
>     struct platform_device as the chipselect. This is confusing and we
>     almost broke the nand support again recently after converting the
>     platform to common clock framework (which changed the device id in the
>     clock lookup - the problem is gone now that we no longer acquire the
>     clock in the nand driver.
>
>     This patch adds a new field - core_chipsel - to the platform_data.
>     Subsequent patches will convert the platforms to using this new field.
>
>     Signed-off-by: Bartosz Golaszewski <bgolaszewski@...libre.com>
>     Signed-off-by: Sekhar Nori <nsekhar@...com>
>
> diff --git a/include/linux/platform_data/mtd-davinci.h b/include/linux/platform_data/mtd-davinci.h
> index f1a2cf655bdb..1bbfa27cccb4 100644
> --- a/include/linux/platform_data/mtd-davinci.h
> +++ b/include/linux/platform_data/mtd-davinci.h
> @@ -56,6 +56,16 @@ struct davinci_nand_pdata {          /* platform_data */
>         uint32_t                mask_ale;
>         uint32_t                mask_cle;
>
> +       /*
> +        * 0-indexed chip-select number of the asynchronous
> +        * interface to which the NAND device has been connected.
> +        *
> +        * So, if you have NAND connected to CS3 of DA850, you
> +        * will pass '1' here. Since the asynchronous interface
> +        * on DA850 starts from CS2.
> +        */

Maybe we should add that on all other DaVinci SoCs the async interface
starts from CS0?

> +       uint32_t                core_chipsel;
> +
>         /* for packages using two chipselects */
>         uint32_t                mask_chipsel;
>
>

Thanks,
Bart