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Message-Id: <75e5ea5901004ef95b37aed719686214910f6541.1525343531.git.asutoshd@codeaurora.org>
Date:   Thu,  3 May 2018 16:37:13 +0530
From:   Asutosh Das <asutoshd@...eaurora.org>
To:     subhashj@...eaurora.org, cang@...eaurora.org,
        vivek.gautam@...eaurora.org, rnayak@...eaurora.org,
        vinholikatti@...il.com, jejb@...ux.vnet.ibm.com,
        martin.petersen@...cle.com, asutoshd@...eaurora.org,
        linux-mmc@...r.kernel.org
Cc:     linux-scsi@...r.kernel.org, Yaniv Gardi <ygardi@...eaurora.org>,
        linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org (open list)
Subject: [PATCH v2 01/10] scsi: ufs: Allowing power mode change

From: Yaniv Gardi <ygardi@...eaurora.org>

Due to M-PHY issues, moving from HS to any other mode or gear or
even Hibern8 may cause some un-predicted behavior
of the device.
This patch adds provides a quirk to address that.

Signed-off-by: Yaniv Gardi <ygardi@...eaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@...eaurora.org>
Signed-off-by: Can Guo <cang@...eaurora.org>
Signed-off-by: Asutosh Das <asutoshd@...eaurora.org>
---
 drivers/scsi/ufs/ufshcd.c | 8 +++++++-
 drivers/scsi/ufs/ufshcd.h | 7 +++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 5bc9dc1..f3083fe 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -4162,9 +4162,15 @@ static int ufshcd_link_startup(struct ufs_hba *hba)
 			goto out;
 	} while (ret && retries--);
 
-	if (ret)
+	if (ret) {
 		/* failed to get the link up... retire */
 		goto out;
+	}
+
+	if (hba->quirks & UFSHCD_QUIRK_BROKEN_PWR_MODE_CHANGE) {
+		ufshcd_dme_set(hba, UIC_ARG_MIB(TX_LCC_ENABLE), 0);
+		ufshcd_dme_set(hba, UIC_ARG_MIB(TX_LCC_ENABLE), 1);
+	}
 
 	if (link_startup_again) {
 		link_startup_again = false;
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index cbe46f6..bb4ecfb 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -591,6 +591,13 @@ struct ufs_hba {
 	 */
 	#define UFSHCD_QUIRK_PRDT_BYTE_GRAN			UFS_BIT(7)
 
+	/*
+	 * Needs to be enabled if moving from HS to any other gear/mode or even
+	 * hibern8 causes unpredicted behavior of device.
+	 * If this quirk is enabled, standard UFS driver will disable/enable
+	 * TX_LCC.
+	 */
+	#define UFSHCD_QUIRK_BROKEN_PWR_MODE_CHANGE		UFS_BIT(8)
 	unsigned int quirks;	/* Deviations from standard UFSHCI spec. */
 
 	/* Device deviations from standard UFS device spec. */
-- 
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.

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