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Message-ID: <e531b9d2-e2d3-aedb-b388-ab639d0530d8@st.com>
Date: Thu, 3 May 2018 17:38:29 +0200
From: Alexandre Torgue <alexandre.torgue@...com>
To: Fabrice Gasnier <fabrice.gasnier@...com>,
<thierry.reding@...il.com>
CC: <robh+dt@...nel.org>, <mark.rutland@....com>,
<linux@...linux.org.uk>, <mcoquelin.stm32@...il.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-pwm@...r.kernel.org>,
<benjamin.gaignard@...aro.org>
Subject: Re: [RESEND PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer
on stm32h743
Hi Fabrice
On 02/23/2018 02:36 PM, Fabrice Gasnier wrote:
> LPTimer pwm cells should be updated to 3, to allow initialization of
> channel, period and polarity.
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...com>
> ---
Applied on stm32-next.
Thanks.
Alex
> arch/arm/boot/dts/stm32h743.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
> index bbfcbac..40d7d76 100644
> --- a/arch/arm/boot/dts/stm32h743.dtsi
> +++ b/arch/arm/boot/dts/stm32h743.dtsi
> @@ -85,6 +85,7 @@
>
> pwm {
> compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> status = "disabled";
> };
>
> @@ -238,6 +239,7 @@
>
> pwm {
> compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> status = "disabled";
> };
>
> @@ -264,6 +266,7 @@
>
> pwm {
> compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> status = "disabled";
> };
>
> @@ -285,6 +288,7 @@
>
> pwm {
> compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> status = "disabled";
> };
> };
> @@ -300,6 +304,7 @@
>
> pwm {
> compatible = "st,stm32-pwm-lp";
> + #pwm-cells = <3>;
> status = "disabled";
> };
> };
>
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