[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20180504190545.5114-4-mylene.josserand@bootlin.com>
Date: Fri, 4 May 2018 21:05:36 +0200
From: Mylène Josserand <mylene.josserand@...tlin.com>
To: linux@...linux.org.uk, maxime.ripard@...tlin.com, wens@...e.org,
marc.zyngier@....com, mark.rutland@....com, robh+dt@...nel.org,
horms@...ge.net.au, geert@...ux-m68k.org, magnus.damm@...il.com
Cc: f.fainelli@...il.com, opendmb@...il.com,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
clabbe.montjoie@...il.com, quentin.schulz@...tlin.com,
thomas.petazzoni@...tlin.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, mylene.josserand@...tlin.com
Subject: [PATCH v9 03/12] ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand <mylene.josserand@...tlin.com>
Reviewed-by: Chen-Yu Tsai <wens@...e.org>
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 379981389eea..a50ccb475de8 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -349,6 +349,11 @@
};
};
+ cpucfg@...0000 {
+ compatible = "allwinner,sun8i-a83t-cpucfg";
+ reg = <0x01700000 0x400>;
+ };
+
syscon: syscon@...0000 {
compatible = "allwinner,sun8i-a83t-system-controller",
"syscon";
--
2.11.0
Powered by blists - more mailing lists