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Message-ID: <dd3bc913-fc99-74f8-b3fc-f8cad316566e@redhat.com>
Date: Fri, 4 May 2018 23:47:41 +0200
From: Paolo Bonzini <pbonzini@...hat.com>
To: Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Luwei Kang <luwei.kang@...el.com>
Cc: kvm@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
hpa@...or.com, x86@...nel.org, rkrcmar@...hat.com,
linux-kernel@...r.kernel.org, joro@...tes.org,
peterz@...radead.org, chao.p.peng@...ux.intel.com
Subject: Re: [PATCH v7 11/13] KVM: x86: Implement Intel Processor Trace MSRs
read/write
On 04/05/2018 12:11, Alexander Shishkin wrote:
>> + */
>> + if ((data & RTIT_CTL_TRACEEN) && !(data & RTIT_CTL_TOPA) &&
>> + !(data & RTIT_CTL_FABRIC_EN) &&
>> + !__pt_cap_get(vmx->pt_desc.caps, PT_CAP_single_range_output))
> You seem to be doing a lot of __pt_cap_get()s on each wrmsr. Did you consider
> decoding the capabilities once and storing the decoded values instead, so
> that in functions like these you can access them by
>
> if (vmx->pt_desc.caps[PT_CAP_single_range_output]) ...
>
> ?
Or pt_cap_get could use a switch statement in pt_cap_get and make it
__always_inline. The argument is always a constant except for pt_cap_show.
What you say is also a possibility though. Are you okay with adding a
PT_CAP_first_unused at the end of enum pt_capabilities, so that the
array can be sized?
Thanks,
Paolo
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