linux-kernel - Re: [PATCH v9 06/12] ARM: smp: Add initialization of CNTVOFF

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Message-ID: <0a377a75-d99c-b00c-ec96-bf5a7daf721a@arm.com>
Date:   Tue, 8 May 2018 09:06:26 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Mylène Josserand <mylene.josserand@...tlin.com>,
        linux@...linux.org.uk, maxime.ripard@...tlin.com, wens@...e.org,
        mark.rutland@....com, robh+dt@...nel.org, horms@...ge.net.au,
        geert@...ux-m68k.org, magnus.damm@...il.com
Cc:     f.fainelli@...il.com, opendmb@...il.com,
        linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
        clabbe.montjoie@...il.com, quentin.schulz@...tlin.com,
        thomas.petazzoni@...tlin.com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9 06/12] ARM: smp: Add initialization of CNTVOFF

On 04/05/18 20:05, Mylène Josserand wrote:
> The CNTVOFF register from arch timer is uninitialized.
> It should be done by the bootloader but it is currently not the case,
> even for boot CPU because this SoC is booting in secure mode.
> It leads to an random offset value meaning that each CPU will have a
> different time, which isn't working very well.
> 
> Add assembly code used for boot CPU and secondary CPU cores to make
> sure that the CNTVOFF register is initialized. Because this code can
> be used by different platforms, add this assembly file in ARM's common
> folder.
> 
> Signed-off-by: Mylène Josserand <mylene.josserand@...tlin.com>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> Tested-by: Geert Uytterhoeven <geert+renesas@...der.be>

Reviewed-by: Marc Zyngier <marc.zyngier@....com>

	M.
-- 
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