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Message-ID: <5e4cd4a7-c375-4b92-f28b-f34900a828a8@codeaurora.org>
Date: Tue, 8 May 2018 21:29:50 -0700
From: Banajit Goswami <bgoswami@...eaurora.org>
To: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
andy.gross@...aro.org, broonie@...nel.org,
linux-arm-msm@...r.kernel.org, alsa-devel@...a-project.org,
robh+dt@...nel.org
Cc: gregkh@...uxfoundation.org, david.brown@...aro.org,
mark.rutland@....com, lgirdwood@...il.com, plai@...eaurora.org,
tiwai@...e.com, perex@...ex.cz, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
rohkumar@....qualcomm.com, spatakok@....qualcomm.com
Subject: Re: [PATCH v7 12/24] ASoC: qdsp6: q6afe: Add support to MI2S sysclks
On 5/1/2018 5:08 AM, Srinivas Kandagatla wrote:
> This patch adds support to LPASS Bit clock, LPASS Digital
> core clock and OSR clock. These clocks are required for both
> MI2S and PCM setup.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> Reviewed-and-tested-by: Rohit kumar <rohitkr@...eaurora.org>
> ---
> sound/soc/qcom/qdsp6/q6afe.c | 171 +++++++++++++++++++++++++++++++++++++++++--
> sound/soc/qcom/qdsp6/q6afe.h | 131 +++++++++++++++++++++++++++++++++
> 2 files changed, 295 insertions(+), 7 deletions(-)
>
>
Acked-by: Banajit Goswami <bgoswami@...eaurora.org>
--
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