linux-kernel - Re: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Fri, 11 May 2018 11:45:24 +0800
From:   Levin Du <djw@...hip.com.cn>
To:     Robin Murphy <robin.murphy@....com>,
        linux-rockchip@...ts.infradead.org
Cc:     Mark Rutland <mark.rutland@....com>, devicetree@...r.kernel.org,
        Wayne Chou <zxf@...hip.com.cn>,
        Heiko Stuebner <heiko@...ech.de>,
        Arnd Bergmann <arnd@...db.de>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        linux-kernel@...r.kernel.org,
        Sugar Zhang <sugar.zhang@...k-chips.com>,
        Rob Herring <robh+dt@...nel.org>,
        Finley Xiao <finley.xiao@...k-chips.com>,
        David Wu <david.wu@...k-chips.com>,
        William Wu <william.wu@...k-chips.com>,
        Rocky Hao <rocky.hao@...k-chips.com>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328

On 2018-05-10 8:50 PM, Robin Murphy wrote:
> On 10/05/18 10:16, djw@...hip.com.cn wrote:
>> From: Levin Du <djw@...hip.com.cn>
>>
>> Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
>> access to the pins defined in the syscon GRF_SOC_CON10.
>
> This is the GPIO_MUTE pin, right? The public TRM is rather vague, but 
> cross-referencing against the datasheet and schematics implies that 
> it's the "gpiomut_*" part of the GRF bit names which is most significant.
>
> It might be worth using a more descriptive name here, since "syscon10" 
> is pretty much meaningless at the board level.
>
> Robin.
>
Previously I though other bits might be able to reference from syscon10, 
other than GPIO_MUTE alone.
If it is renamed to gpio-mute, then the GPIO_MUTE pin is accessed as 
`<&gpio-mute 1>`. Yet other
bits in syscon10 can also be referenced, say, `<&gpio-mute 10>`, which 
is not good.

I'd like to add a `gpio,syscon-bit` property to gpio-syscon, which 
overrides the properties
of bit_count,  data_bit_offset and dir_bit_offset in the driver. For 
example:

                 gpio_mute: gpio-mute {
                         compatible = "rockchip,gpio-syscon";
                         gpio-controller;
                         #gpio-cells = <2>;
                         gpio,syscon-dev = <0 0x0428 0>;
                         gpio,syscon-bit = <1 1 0>;
                 };

That way, the mute pin is strictly specified as <&gpio_mute 0>, and 
<&gpio_mute 1> will be invalid.
I think that is neat, and consistent with the gpio_mute name.

Thanks
Levin