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Message-ID: <alpine.DEB.2.21.1805132339240.1582@nanos.tec.linutronix.de>
Date: Sun, 13 May 2018 23:55:00 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
cc: Ingo Molnar <mingo@...hat.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, Hugh Dickins <hughd@...gle.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] x86/mm: Introduce 'no5lvl' kernel parameter
On Fri, 11 May 2018, Kirill A. Shutemov wrote:
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
> @@ -1008,6 +1008,12 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
> */
> setup_clear_cpu_cap(X86_FEATURE_PCID);
> #endif
> +
> +#ifdef CONFIG_X86_5LEVEL
> + /* Clear the 5-level paging feature if user asked for 'no5lvl' */
no5lvl is only one reason why 5 level paging is not available.
> + if (!__pgtable_l5_enabled)
> + setup_clear_cpu_cap(X86_FEATURE_LA57);
> +#endif
And that #ifdeffery can be avoided by simply doing:
if (IS_ENABLED(CONFIG_X86_5LEVEL) && !pgtable_l5_enabled)
setup_clear_cpu_cap(X86_FEATURE_LA57);
Hmm?
Thanks,
tglx
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