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Message-Id: <20180514211610.26618-11-enric.balletbo@collabora.com>
Date: Mon, 14 May 2018 23:16:10 +0200
From: Enric Balletbo i Serra <enric.balletbo@...labora.com>
To: MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Will Deacon <will.deacon@....com>,
Heiko Stuebner <heiko@...ech.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Sandy Huang <hjc@...k-chips.com>,
David Airlie <airlied@...ux.ie>
Cc: linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
Derek Basehore <dbasehore@...omium.org>,
linux-clk@...r.kernel.org, linux-rockchip@...ts.infradead.org,
dri-devel@...ts.freedesktop.org, Lin Huang <hl@...k-chips.com>,
kernel@...labora.com, Sean Paul <seanpaul@...omium.org>,
linux-arm-kernel@...ts.infradead.org,
Nickey Yang <nickey.yang@...k-chips.com>,
Yakir Yang <kuankuan.y@...il.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
Catalin Marinas <catalin.marinas@....com>,
Mark Yao <markyao0591@...il.com>,
Jacob Chen <jacob-chen@...wrt.com>,
Kever Yang <kever.yang@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Douglas Anderson <dianders@...omium.org>,
Jeffy Chen <jeffy.chen@...k-chips.com>,
Matthias Kaehlcke <mka@...omium.org>,
devicetree@...r.kernel.org, Caesar Wang <wxt@...k-chips.com>,
Chris Zhong <zyw@...k-chips.com>,
Shunqian Zheng <zhengsq@...k-chips.com>,
Mark Rutland <mark.rutland@....com>
Subject: [RFC PATCH 10/10] arm64: dts: rockchip: Enable dmc and dfi nodes on gru.
From: Lin Huang <hl@...k-chips.com>
Enable the DMC (Dynamic Memory Controller) and the DFI (DDR PHY Interface)
nodes on gru/kevin boards so we can support DDR DVFS.
Signed-off-by: Lin Huang <hl@...k-chips.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
---
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 21 ++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index 18f546f2dfd1..ba2cfdd082b8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -525,6 +525,12 @@
extcon = <&usbc_extcon0>, <&usbc_extcon1>;
};
+&dmc_opp_table {
+ opp04 {
+ opp-suspend;
+ };
+};
+
/*
* Set some suspend operating points to avoid OVP in suspend
*
@@ -600,6 +606,10 @@
<400000000>;
};
+&display_subsystem {
+ devfreq = <&dmc>;
+};
+
&emmc_phy {
status = "okay";
};
@@ -766,6 +776,17 @@ ap_i2c_audio: &i2c8 {
status = "okay";
};
+&dfi {
+ status = "okay";
+};
+
+&dmc {
+ status = "okay";
+ center-supply = <&ppvar_centerlogic>;
+ upthreshold = <25>;
+ downdifferential = <15>;
+};
+
&sdhci {
/*
* Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e012cc8ae3d4..518c742293fc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -160,7 +160,7 @@
};
};
- display-subsystem {
+ display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopl_out>, <&vopb_out>;
};
--
2.17.0
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