linux-kernel - Re: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328

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Message-ID: <62ff43c8-8f98-1bc4-b208-c2bed4bf192e@t-chip.com.cn>
Date:   Mon, 14 May 2018 09:28:40 +0800
From:   Levin Du <djw@...hip.com.cn>
To:     Rob Herring <robh+dt@...nel.org>
Cc:     Robin Murphy <robin.murphy@....com>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@...ts.infradead.org>,
        Mark Rutland <mark.rutland@....com>,
        devicetree@...r.kernel.org, Wayne Chou <zxf@...hip.com.cn>,
        Heiko Stuebner <heiko@...ech.de>,
        Arnd Bergmann <arnd@...db.de>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sugar Zhang <sugar.zhang@...k-chips.com>,
        Finley Xiao <finley.xiao@...k-chips.com>,
        David Wu <david.wu@...k-chips.com>,
        William Wu <william.wu@...k-chips.com>,
        Rocky Hao <rocky.hao@...k-chips.com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v1 3/5] arm64: dts: rockchip: Add gpio-syscon10 to rk3328

On 2018-05-11 8:24 PM, Rob Herring wrote:
> On Thu, May 10, 2018 at 10:45 PM, Levin Du <djw@...hip.com.cn> wrote:
>> On 2018-05-10 8:50 PM, Robin Murphy wrote:
>>> On 10/05/18 10:16, djw@...hip.com.cn wrote:
>>>> From: Levin Du <djw@...hip.com.cn>
>>>>
>>>> Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
>>>> access to the pins defined in the syscon GRF_SOC_CON10.
>>>
>>> This is the GPIO_MUTE pin, right? The public TRM is rather vague, but
>>> cross-referencing against the datasheet and schematics implies that it's the
>>> "gpiomut_*" part of the GRF bit names which is most significant.
>>>
>>> It might be worth using a more descriptive name here, since "syscon10" is
>>> pretty much meaningless at the board level.
>>>
>>> Robin.
>>>
>> Previously I though other bits might be able to reference from syscon10,
>> other than GPIO_MUTE alone.
>> If it is renamed to gpio-mute, then the GPIO_MUTE pin is accessed as
>> `<&gpio-mute 1>`. Yet other
>> bits in syscon10 can also be referenced, say, `<&gpio-mute 10>`, which is
>> not good.
>>
>> I'd like to add a `gpio,syscon-bit` property to gpio-syscon, which overrides
>> the properties
>> of bit_count,  data_bit_offset and dir_bit_offset in the driver. For
> No. Once you are describing individual register bits, it is too low
> level for DT.

Okay. So I'll rename it to gpio_mute, and reference the output pin as 
<&gpio_mute 1>:

+               // Use <&gpio_mute 1> to ref to GPIO_MUTE pin
+		gpio_mute: gpio-mute {
+			compatible = "rockchip,gpio-syscon";
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio,syscon-dev = <0 0x0428 0>;
+		};
  	};


Thanks
Levin