[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <83866d054b27419c9d9dd97d9c66c3de@AcuMS.aculab.com>
Date: Mon, 14 May 2018 09:04:38 +0000
From: David Laight <David.Laight@...LAB.COM>
To: "'H. Peter Anvin'" <hpa@...or.com>,
'Alexey Dobriyan' <adobriyan@...il.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"x86@...nel.org" <x86@...nel.org>
Subject: RE: [PATCH] x86: pad assembly functions with INT3
From: H. Peter Anvin
> Sent: 11 May 2018 19:54
>
> On 05/10/18 09:39, David Laight wrote:
> > From: Alexey Dobriyan
> >> Sent: 07 May 2018 22:38
> >>
> >> Use INT3 instead of NOP. All that padding between functions is
> >> an illegal area, no legitimate code should jump into it.
> >>
> >> I've checked x86_64 allyesconfig disassembly, all changes looks sane:
> >> INT3 is only used after RET or unconditional JMP.
> >
> > I thought there was a performance penalty (on at least some cpu)
> > depending on the number of and the actual instructions used for padding.
> >
> > I believe that is why gcc generates a small number of very long 'nop'
> > instructions when padding code.
> >
>
> There is a performance penalty for using NOP instructions *in the
> fallthrough case.* In the case where the padding is never supposed to
> be executed, which is what we're talking about here, it is irrelevant.
Not completely irrelevant, the instructions stream gets fetched and decoded
beyond the jmp/ret at the end of the function.
At some point the cpu will decode the jmp/ret and fetch/decode from the
target address.
I guess it won't try to speculatively execute the 'pad' instructions
- but you can never really tell!
David
Powered by blists - more mailing lists