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Message-Id: <1526295432-20640-13-git-send-email-luwei.kang@intel.com>
Date: Mon, 14 May 2018 18:57:12 +0800
From: Luwei Kang <luwei.kang@...el.com>
To: kvm@...r.kernel.org
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
x86@...nel.org, chao.p.peng@...ux.intel.com,
thomas.lendacky@....com, bp@...e.de, Kan.liang@...el.com,
Janakarajan.Natarajan@....com, dwmw@...zon.co.uk,
linux-kernel@...r.kernel.org, alexander.shishkin@...ux.intel.com,
peterz@...radead.org, mathieu.poirier@...aro.org,
kstewart@...uxfoundation.org, gregkh@...uxfoundation.org,
pbonzini@...hat.com, rkrcmar@...hat.com, david@...hat.com,
bsd@...hat.com, yu.c.zhang@...ux.intel.com, joro@...tes.org,
Luwei Kang <luwei.kang@...el.com>
Subject: [PATCH v8 12/12] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest
Currently, Intel Processor Trace do not support tracing in L1 guest
VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM,
on these type of processors, execution of the VMXON instruction will
clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL
causes a general-protection exception (#GP).
Signed-off-by: Luwei Kang <luwei.kang@...el.com>
---
arch/x86/kvm/vmx.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 170cd48..7ace11a 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -3996,7 +3996,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
break;
case MSR_IA32_RTIT_CTL:
if ((pt_mode != PT_MODE_HOST_GUEST) ||
- vmx_rtit_ctl_check(vcpu, data))
+ vmx_rtit_ctl_check(vcpu, data) ||
+ vmx->nested.vmxon)
return 1;
vmcs_write64(GUEST_IA32_RTIT_CTL, data);
pt_set_intercept_for_msr(vmx, !(data & RTIT_CTL_TRACEEN));
@@ -8089,6 +8090,11 @@ static int handle_vmon(struct kvm_vcpu *vcpu)
if (ret)
return ret;
+ if (pt_mode == PT_MODE_HOST_GUEST) {
+ vmx->pt_desc.guest.ctl = 0;
+ pt_set_intercept_for_msr(vmx, 1);
+ }
+
nested_vmx_succeed(vcpu);
return kvm_skip_emulated_instruction(vcpu);
}
--
1.8.3.1
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