linux-kernel - Re: [PATCH v2] pinctrl: tegra20: Provide CDEV1/2 clock muxes

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Message-ID: <CACRpkdbykxwHvQgfFnihOHy1hsM7ZWHtCYGCNb49MbNkKWz6Hg@mail.gmail.com>
Date:   Wed, 16 May 2018 14:23:23 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Dmitry Osipenko <digetx@...il.com>,
        Stephen Warren <swarren@...dotorg.org>
Cc:     Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Peter De Schrijver <pdeschrijver@...dia.com>,
        Prashant Gaikwad <pgaikwad@...dia.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Marcel Ziswiler <marcel@...wiler.com>,
        Marc Dietrich <marvin24@....de>,
        linux-clk <linux-clk@...r.kernel.org>,
        "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
        linux-tegra@...r.kernel.org,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] pinctrl: tegra20: Provide CDEV1/2 clock muxes

On Fri, May 4, 2018 at 12:55 AM, Dmitry Osipenko <digetx@...il.com> wrote:

> Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks.
> Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so
> that main clk-controller driver could get an actual parent clock for the
> CDEV1/2 clocks.
>
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> Reviewed-by: Marcel Ziswiler <marcel@...wiler.com>
> Tested-by: Marcel Ziswiler <marcel@...wiler.com>
> Tested-by: Marc Dietrich <marvin24@....de>
> Acked-by: Peter De Schrijver <pdeschrijver@...dia.com>
> ---
>
> v2: This patch is factored out from the v1 clk/DT series so that it could be
>     applied separately.

Patch applied unless Stephen W protests.
Please include swarren on future patches to this driver.

Yours,
Linus Walleij