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Message-Id: <1526552938-21292-1-git-send-email-vviswana@codeaurora.org>
Date: Thu, 17 May 2018 15:58:55 +0530
From: Vijay Viswanath <vviswana@...eaurora.org>
To: adrian.hunter@...el.com, ulf.hansson@...aro.org,
robh+dt@...nel.org, mark.rutland@....com
Cc: linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
shawn.lin@...k-chips.com, linux-arm-msm@...r.kernel.org,
georgi.djakov@...aro.org, devicetree@...r.kernel.org,
asutoshd@...eaurora.org, stummala@...eaurora.org,
venkatg@...eaurora.org, jeremymc@...hat.com,
vviswana@...eaurora.org, bjorn.andersson@...aro.org,
riteshh@...eaurora.org, vbadigan@...eaurora.org,
dianders@...gle.com, sayalil@...eaurora.org
Subject: [PATCH V1 0/3] Changes for SDCC5 version
With SDCC5, the MCI register space got removed and the offset/order of
several registers have changed. Based on SDCC version used and the register,
we need to pick the base address and offset.
Changes since RFC:
Dropped voltage regulator changes in sdhci-msm
Split the "Register changes for sdcc V5" patch
Instead of checking mci removal for deciding which base addr to use,
new function pointers are defined for the 2 variants of sdcc:
1) MCI present
2) V5 (mci removed)
Instead of string comparing with the compatible string from DT file,
the sdhci_msm_probe will now pick the data associated with the
compatible entry and use it to load variant specific address offsets
and msm variant specific read/write ops.
Sayali Lokhande (2):
mmc: sdhci-msm: Define new Register address map
mmc: host: Register changes for sdcc V5
Vijay Viswanath (1):
mmc: sdhci-msm: Add msm version specific ops and data structures
.../devicetree/bindings/mmc/sdhci-msm.txt | 5 +-
drivers/mmc/host/sdhci-msm.c | 545 ++++++++++++++++-----
2 files changed, 423 insertions(+), 127 deletions(-)
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
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