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Message-ID: <alpine.DEB.2.21.1805181232280.2172@nanos.tec.linutronix.de>
Date: Fri, 18 May 2018 12:38:39 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Josh Poimboeuf <jpoimboe@...hat.com>
cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
Linus Torvalds <torvalds@...ux-foundation.org>,
Andy Lutomirsky <luto@...nel.org>,
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hughd@...gle.com, Brian Gerst <brgerst@...il.com>,
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Ingo Molnar <mingo@...nel.org>, Borislav Petkov <bp@...en8.de>,
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"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [patch V181 35/54] x86/entry: Align entry text section to PMD
boundary
On Thu, 17 May 2018, Josh Poimboeuf wrote:
> On Wed, Dec 20, 2017 at 10:35:38PM +0100, Thomas Gleixner wrote:
> > From: Thomas Gleixner <tglx@...utronix.de>
> >
> > The (irq)entry text must be visible in the user space page tables. To allow
> > simple PMD based sharing, make the entry text PMD aligned.
> >
> > Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
> > Signed-off-by: Ingo Molnar <mingo@...nel.org>
>
> With my config, this patch adds 2.5M (+~25%) to the kernel text size.
> Is there a more granular way to achieve this?
We could make it PTE granular with some effort, but that would make the
whole PTI handling more complex. So not sure, if that's worth it.
Thanks,
tglx
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