[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20180520163117.14125-2-paul@crapouillou.net>
Date: Sun, 20 May 2018 16:31:13 +0000
From: Paul Cercueil <paul@...pouillou.net>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>
Cc: James Hogan <jhogan@...nel.org>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, Paul Cercueil <paul@...pouillou.net>
Subject: [PATCH 2/6] clk: ingenic: Support specifying "wait for clock stable" delay
Some clocks need a small delay after being ungated to run stable, as
using them too soon might result in hardware lockups.
Signed-off-by: Paul Cercueil <paul@...pouillou.net>
---
drivers/clk/ingenic/cgu.c | 3 +++
drivers/clk/ingenic/cgu.h | 2 ++
2 files changed, 5 insertions(+)
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index 4b31145eb8aa..5ef7d9ba2195 100644
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -512,6 +512,9 @@ static int ingenic_clk_enable(struct clk_hw *hw)
spin_lock_irqsave(&cgu->lock, flags);
ingenic_cgu_gate_set(cgu, &clk_info->gate, false);
spin_unlock_irqrestore(&cgu->lock, flags);
+
+ if (clk_info->gate.delay_us)
+ udelay(clk_info->gate.delay_us);
}
return 0;
diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h
index 4d2e3fad0e30..542192376ebf 100644
--- a/drivers/clk/ingenic/cgu.h
+++ b/drivers/clk/ingenic/cgu.h
@@ -112,11 +112,13 @@ struct ingenic_cgu_fixdiv_info {
* @reg: offset of the gate control register within the CGU
* @bit: offset of the bit in the register that controls the gate
* @clear_to_gate: if set, the clock is gated when the bit is cleared
+ * @delay_us: delay in microseconds after which the clock is considered stable
*/
struct ingenic_cgu_gate_info {
unsigned reg;
u8 bit;
bool clear_to_gate;
+ u16 delay_us;
};
/**
--
2.17.0
Powered by blists - more mailing lists