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Message-ID: <20180521131740.GI19713@arm.com>
Date: Mon, 21 May 2018 14:17:41 +0100
From: Will Deacon <will.deacon@....com>
To: Ilia Lin <ilialin@...eaurora.org>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
mark.rutland@....com, viresh.kumar@...aro.org, nm@...com,
lgirdwood@...il.com, broonie@...nel.org, andy.gross@...aro.org,
david.brown@...aro.org, catalin.marinas@....com, rjw@...ysocki.net,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
rnayak@...eaurora.org, linux-pm@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
amit.kucheria@...aro.org, tfinkel@...eaurora.org,
nicolas.dechesne@...aro.org, celster@...eaurora.org,
linux-soc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v9 01/15] soc: qcom: Separate kryo l2 accessors from PMU
driver
On Mon, May 21, 2018 at 02:25:18PM +0300, Ilia Lin wrote:
> The driver provides kernel level API for other drivers
> to access the MSM8996 L2 cache registers.
> Separating the L2 access code from the PMU driver and
> making it public to allow other drivers use it.
> The accesses must be separated with a single spinlock,
> maintained in this driver.
>
> Signed-off-by: Ilia Lin <ilialin@...eaurora.org>
> ---
> drivers/perf/Kconfig | 1 +
> drivers/perf/qcom_l2_pmu.c | 90 ++++++++++--------------------------
I'm fine with the perf bits:
Acked-by: Will Deacon <will.deacon@....com>
Will
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