[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20180522194554.GA21209@rob-hp-laptop>
Date: Tue, 22 May 2018 14:45:54 -0500
From: Rob Herring <robh@...nel.org>
To: Vijay Viswanath <vviswana@...eaurora.org>
Cc: adrian.hunter@...el.com, ulf.hansson@...aro.org,
mark.rutland@....com, linux-mmc@...r.kernel.org,
linux-kernel@...r.kernel.org, shawn.lin@...k-chips.com,
linux-arm-msm@...r.kernel.org, georgi.djakov@...aro.org,
devicetree@...r.kernel.org, asutoshd@...eaurora.org,
stummala@...eaurora.org, venkatg@...eaurora.org,
jeremymc@...hat.com, bjorn.andersson@...aro.org,
riteshh@...eaurora.org, vbadigan@...eaurora.org,
dianders@...gle.com, sayalil@...eaurora.org
Subject: Re: [PATCH V1 3/3] mmc: host: Register changes for sdcc V5
On Thu, May 17, 2018 at 03:58:58PM +0530, Vijay Viswanath wrote:
> From: Sayali Lokhande <sayalil@...eaurora.org>
>
> For SDCC version 5.0.0 and higher, new compatible string
> "qcom,sdhci-msm-v5" is added.
>
> Based on the msm variant, pick the relevant variant data and
> use it for register read/write to msm specific registers.
>
> Signed-off-by: Sayali Lokhande <sayalil@...eaurora.org>
> Signed-off-by: Vijay Viswanath <vviswana@...eaurora.org>
> ---
> .../devicetree/bindings/mmc/sdhci-msm.txt | 5 +-
Please split binding patches.
> drivers/mmc/host/sdhci-msm.c | 344 +++++++++++++--------
> 2 files changed, 222 insertions(+), 127 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> index bfdcdc4..c2b7b2b 100644
> --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
> @@ -4,7 +4,10 @@ This file documents differences between the core properties in mmc.txt
> and the properties used by the sdhci-msm driver.
>
> Required properties:
> -- compatible: Should contain "qcom,sdhci-msm-v4".
> +- compatible: Should contain "qcom,sdhci-msm-v4" or "qcom,sdhci-msm-v5".
Format with 1 per line.
> + For SDCC version 5.0.0, MCI registers are removed from SDCC
> + interface and some registers are moved to HC. New compatible
> + string is added to support this change - "qcom,sdhci-msm-v5".
> - reg: Base address and length of the register in the following order:
> - Host controller register map (required)
> - SD Core register map (required)
Powered by blists - more mailing lists