linux-kernel - Re: [PATCH 2/2] soc: bcm: brcmstb: Add missing DDR MEMC compatible strings

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Message-ID: <20180522223133.GA11292@rob-hp-laptop>
Date:   Tue, 22 May 2018 17:31:33 -0500
From:   Rob Herring <robh@...nel.org>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     linux-arm-kernel@...ts.infradead.org,
        Mark Rutland <mark.rutland@....com>,
        Brian Norris <computersforpeace@...il.com>,
        Gregory Fong <gregory.0xf0@...il.com>,
        "maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE" 
        <bcm-kernel-feedback-list@...adcom.com>,
        Doug Berger <opendmb@...il.com>,
        Justin Chen <justinpopo6@...il.com>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] soc: bcm: brcmstb: Add missing DDR MEMC compatible
 strings

On Fri, May 11, 2018 at 03:02:42PM -0700, Florian Fainelli wrote:
> We would not be matching the following chip/compatible strings
> combinations, which would lead to not setting the warm boot flag
> correctly, fix that:
> 
>     7260A0/B0: brcm,brcmstb-memc-ddr-rev-b.2.1
>     7255A0: brcm,brcmstb-memc-ddr-rev-b.2.3
>     7278Bx: brcm,brcmstb-memc-ddr-rev-b.3.1
> 
> The B2.1 core (which is in 7260 A0 and B0) doesn't have the
> SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL setup in the memsys init code, nor
> does it have the warm boot flag re-definition on entry. Those changes
> were for B2.2 and later MEMSYS cores. Fall back to the previous S2/S3
> entry method for these specific chips.
> 
> Fixes: 0b741b8234c8 ("soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)")
> Signed-off-by: Florian Fainelli <f.fainelli@...il.com>
> ---
>  Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt |  3 +++
>  drivers/soc/bcm/brcmstb/pm/pm-arm.c                        | 12 ++++++++++++
>  2 files changed, 15 insertions(+)

Reviewed-by: Rob Herring <robh@...nel.org>