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Message-Id: <4eccff9a409d229c81e6b4cc453a7f4e29e94510.1526990589.git.stefan@agner.ch>
Date: Tue, 22 May 2018 14:07:08 +0200
From: Stefan Agner <stefan@...er.ch>
To: boris.brezillon@...tlin.com, dwmw2@...radead.org,
computersforpeace@...il.com, marek.vasut@...il.com,
robh+dt@...nel.org, mark.rutland@....com, thierry.reding@...il.com,
mturquette@...libre.com, sboyd@...nel.org
Cc: dev@...xeye.de, miquel.raynal@...tlin.com, richard@....at,
marcel@...wiler.com, krzk@...nel.org, digetx@...il.com,
benjamin.lindqvist@...ian.se, jonathanh@...dia.com,
pdeschrijver@...dia.com, pgaikwad@...dia.com, mirza.krak@...il.com,
linux-mtd@...ts.infradead.org, linux-tegra@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, Stefan Agner <stefan@...er.ch>
Subject: [RESEND PATCH 4/5] ARM: tegra: add Tegra20 NAND flash controller node
From: Lucas Stach <dev@...xeye.de>
Add basic controller description to be extended
by individual boards.
Signed-off-by: Lucas Stach <dev@...xeye.de>
Signed-off-by: Stefan Agner <stefan@...er.ch>
---
arch/arm/boot/dts/tegra20.dtsi | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 0a7136462a1a..5772d0800ad7 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -425,6 +425,19 @@
status = "disabled";
};
+ nand: nand@...08000 {
+ compatible = "nvidia,tegra20-nand";
+ reg = <0x70008000 0x100>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
+ clock-names = "nand";
+ resets = <&tegra_car 13>;
+ reset-names = "nand";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+
pwm: pwm@...0a000 {
compatible = "nvidia,tegra20-pwm";
reg = <0x7000a000 0x100>;
--
2.17.0
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