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Message-ID: <cf74dc2b-ba17-be3d-b3ca-7cda515bf7a6@st.com>
Date:   Tue, 22 May 2018 17:51:04 +0200
From:   Fabrice Gasnier <fabrice.gasnier@...com>
To:     Jonathan Cameron <jic23@...nel.org>, <alexandre.torgue@...com>
CC:     <robh+dt@...nel.org>, <mark.rutland@....com>,
        <mcoquelin.stm32@...il.com>, <lars@...afoo.de>, <knaack.h@....de>,
        <pmeerw@...erw.net>, <linux-iio@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <benjamin.gaignard@...aro.org>
Subject: Re: [PATCH v2 3/3] ARM: dts: stm32: Add ADC support to stm32mp157c

On 05/07/2018 07:23 PM, Jonathan Cameron wrote:
> On Wed, 2 May 2018 09:44:51 +0200
> Fabrice Gasnier <fabrice.gasnier@...com> wrote:
> 
>> stm32mp157c has an ADC block with two physical ADCs.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@...com>
> The driver support is now queued up in the IIO tree and should
> be in Linux next later this week.

Hi,

Many Thanks Jonathan :-)

Alex, I just sent an updated version (v3) of this patch (with additional
dmas).

Best Regards,
Fabrice

> 
> Thanks,
> 
> Jonathan
> 
>> ---
>>  arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++
>>  1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
>> index bc3eddc..7758a90 100644
>> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
>> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
>> @@ -160,6 +160,38 @@
>>  			status = "disabled";
>>  		};
>>  
>> +		adc: adc@...03000 {
>> +			compatible = "st,stm32mp1-adc-core";
>> +			reg = <0x48003000 0x400>;
>> +			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&rcc ADC12>, <&rcc ADC12_K>;
>> +			clock-names = "bus", "adc";
>> +			interrupt-controller;
>> +			#interrupt-cells = <1>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +			status = "disabled";
>> +
>> +			adc1: adc@0 {
>> +				compatible = "st,stm32mp1-adc";
>> +				#io-channel-cells = <1>;
>> +				reg = <0x0>;
>> +				interrupt-parent = <&adc>;
>> +				interrupts = <0>;
>> +				status = "disabled";
>> +			};
>> +
>> +			adc2: adc@100 {
>> +				compatible = "st,stm32mp1-adc";
>> +				#io-channel-cells = <1>;
>> +				reg = <0x100>;
>> +				interrupt-parent = <&adc>;
>> +				interrupts = <1>;
>> +				status = "disabled";
>> +			};
>> +		};
>> +
>>  		rcc: rcc@...00000 {
>>  			compatible = "st,stm32mp1-rcc", "syscon";
>>  			reg = <0x50000000 0x1000>;
> 

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