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Message-Id: <20180523034712.3420-2-cang@codeaurora.org>
Date: Wed, 23 May 2018 11:47:10 +0800
From: Can Guo <cang@...eaurora.org>
To: subhashj@...eaurora.org, asutoshd@...eaurora.org,
vivek.gautam@...eaurora.org, mgautam@...eaurora.org, kishon@...com,
robh+dt@...nel.org, mark.rutland@....com
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Can Guo <cang@...eaurora.org>
Subject: [PATCH v5 1/3] phy: Power on PHY before start Serdes configuration
PHYs should be powered on before register configuration starts.
Signed-off-by: Can Guo <cang@...eaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index 97ef942..9bfdba1 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -1000,6 +1000,12 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp)
SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
}
+ /*
+ * Pull out PHY from POWER DOWN state.
+ * This is active low enable signal to power-down PHY.
+ */
+ qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, cfg->pwrdn_ctrl);
+
/* Serdes configuration */
qcom_qmp_phy_configure(serdes, cfg->regs, cfg->serdes_tbl,
cfg->serdes_tbl_num);
--
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