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Message-Id: <1527179600-26441-3-git-send-email-richard.gong@linux.intel.com>
Date: Thu, 24 May 2018 11:33:14 -0500
From: richard.gong@...ux.intel.com
To: catalin.marinas@....com, will.deacon@....com, dinguyen@...nel.org,
robh+dt@...nel.org, mark.rutland@....com, atull@...nel.org,
mdf@...nel.org, arnd@...db.de, gregkh@...uxfoundation.org,
corbet@....net
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-fpga@...r.kernel.org,
linux-doc@...r.kernel.org, yves.vandervennet@...ux.intel.com,
richard.gong@...ux.intel.com, richard.gong@...el.com
Subject: [PATCHv5 2/8] arm64: dts: stratix10: add stratix10 service driver binding to base dtsi
From: Richard Gong <richard.gong@...el.com>
Add Intel Stratix10 service layer to the device tree
Signed-off-by: Richard Gong <richard.gong@...el.com>
Signed-off-by: Alan Tull <atull@...nel.org>
---
v2: Change to put service layer driver node under the firmware node
Change compatible to "intel, stratix10-svc"
v3: No change
v4: s/service driver/stratix10 service driver/ in subject line
v5: No change
---
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index d8c94d5..c257287 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -24,6 +24,19 @@
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ service_reserved: svcbuffer@0 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0x0 0x0 0x1000000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -487,5 +500,13 @@
status = "disabled";
};
+
+ firmware {
+ svc {
+ compatible = "intel,stratix10-svc";
+ method = "smc";
+ memory-region = <&service_reserved>;
+ };
+ };
};
};
--
2.7.4
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