linux-kernel - Re: [PATCH v1 1/2] cpufreq: tegra20: Constify rate value of the intermediate clk

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 24 May 2018 09:57:03 +0530
From:   Viresh Kumar <viresh.kumar@...aro.org>
To:     Dmitry Osipenko <digetx@...il.com>
Cc:     "Rafael J. Wysocki" <rjw@...ysocki.net>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Peter De Schrijver <pdeschrijver@...dia.com>,
        linux-tegra@...r.kernel.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/2] cpufreq: tegra20: Constify rate value of the
 intermediate clk

On 23-05-18, 19:00, Dmitry Osipenko wrote:
> PLL_P is known to be always running at 216MHz, hence there is no need to
> query its rate.
> 
> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
> ---
>  drivers/cpufreq/tegra20-cpufreq.c | 12 +++++-------
>  1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/cpufreq/tegra20-cpufreq.c b/drivers/cpufreq/tegra20-cpufreq.c
> index 05f57dcd5215..3ad6bded6efc 100644
> --- a/drivers/cpufreq/tegra20-cpufreq.c
> +++ b/drivers/cpufreq/tegra20-cpufreq.c
> @@ -24,6 +24,8 @@
>  #include <linux/platform_device.h>
>  #include <linux/types.h>
>  
> +#define PLL_P_FREQ	216000
> +
>  static struct cpufreq_frequency_table freq_table[] = {
>  	{ .frequency = 216000 },
>  	{ .frequency = 312000 },
> @@ -48,18 +50,15 @@ struct tegra20_cpufreq {
>  static unsigned int tegra_get_intermediate(struct cpufreq_policy *policy,
>  					   unsigned int index)
>  {
> -	struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
> -	unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
> -
>  	/*
>  	 * Don't switch to intermediate freq if:
>  	 * - we are already at it, i.e. policy->cur == ifreq
>  	 * - index corresponds to ifreq
>  	 */
> -	if (freq_table[index].frequency == ifreq || policy->cur == ifreq)
> +	if (index == 0 || policy->cur == PLL_P_FREQ)
>  		return 0;
>  
> -	return ifreq;
> +	return PLL_P_FREQ;
>  }
>  
>  static int tegra_target_intermediate(struct cpufreq_policy *policy,
> @@ -93,14 +92,13 @@ static int tegra_target(struct cpufreq_policy *policy, unsigned int index)
>  {
>  	struct tegra20_cpufreq *cpufreq = cpufreq_get_driver_data();
>  	unsigned long rate = freq_table[index].frequency;
> -	unsigned int ifreq = clk_get_rate(cpufreq->pll_p_clk) / 1000;
>  	int ret;
>  
>  	/*
>  	 * target freq == pll_p, don't need to take extra reference to pll_x_clk
>  	 * as it isn't used anymore.
>  	 */
> -	if (rate == ifreq)
> +	if (index == 0)
>  		return clk_set_parent(cpufreq->cpu_clk, cpufreq->pll_p_clk);
>  
>  	ret = clk_set_rate(cpufreq->pll_x_clk, rate * 1000);

Acked-by: Viresh Kumar <viresh.kumar@...aro.org>

-- 
viresh