linux-kernel - [PATCH 4/9] clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled

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Message-Id: <20180525181150.17873-5-david@lechnology.com>
Date:   Fri, 25 May 2018 13:11:45 -0500
From:   David Lechner <david@...hnology.com>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>
Cc:     Sekhar Nori <nsekhar@...com>, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Kevin Hilman <khilman@...nel.org>, linux-kernel@...r.kernel.org
Subject: [PATCH 4/9] clk: davinci: pll-dm646x: keep PLL2 SYSCLK1 always enabled

From: Sekhar Nori <nsekhar@...com>

PLL2 SYSCLK1 on DM646x is connected to DDR2 PHY and cannot
be disabled. Mark it so to prevent unused clock disable
infrastructure from disabling it.

Signed-off-by: Sekhar Nori <nsekhar@...com>
Reviewed-by: David Lechner <david@...hnology.com>
---
 drivers/clk/davinci/pll-dm646x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/davinci/pll-dm646x.c b/drivers/clk/davinci/pll-dm646x.c
index a61cc3256418..0ae827e3ce80 100644
--- a/drivers/clk/davinci/pll-dm646x.c
+++ b/drivers/clk/davinci/pll-dm646x.c
@@ -72,7 +72,7 @@ static const struct davinci_pll_clk_info dm646x_pll2_info = {
 	.flags = 0,
 };
 
-SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, 0);
+SYSCLK(1, pll2_sysclk1, pll2_pllen, 4, SYSCLK_ALWAYS_ENABLED);
 
 int dm646x_pll2_init(struct device *dev, void __iomem *base)
 {
-- 
2.17.0